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Showing content with the highest reputation on 05/29/22 in Posts

  1. Stefanie's Feonix256 already has a bespoke Video FPGA system that relies on external RAM ... where Vera handles the Video RAM speed issue by using an embedded RAM core, her's handles it by using a wider data path. I presume it uses a bigger FPGA, and since she has split Video FPGA and Audio FPGA, there is also not the need to dedicate any of the pins on the Video FPGA for supporting audio functions. It seems to me that Vera was intended to be a solution on a (in normal times) readily available and relatively inexpensive FPGA. Customizing the bus system for, eg, a PICbus CPU or a Z80 bus, an SPI bus ... especially one supporting swinging the MISO into a second MOSI_2 to allow direct dual bit loading from dual_bit supporting serial flash ROMs ... seems like in line with that idea, in reducing the need for glue logic or a CPLD to interface to the Vera system. However, as far as "upgrading" Vera to be more capable ... there will then be upgrades to be made to that one, and then another, and then another. I am not entirely sure where that path ends except at the current cutting edge of GPU's. Rather than starting with Vera and upgrade, I'd suggest that path should identify a specific vision of what kind of video chip it wants, and then try to implement it ... sure, borrowing from the Vera design where useful, but rather than setting itself out as "Vera 2.0", it should be "My ideal retro video chip, 1.0".
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