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Everything posted by StinkerB06

  1. I thought the YM3012 was just used to convert the digital audio bitstreams from the YM2151 into analog audio outputs. Like, the CPU wouldn't be able to address it.
  2. The YM2151 has more channels (8 versus 6). The YM2612 has only 6 channels and not 7, as the DAC shuts off the 6th FM channel. Both of these have 4 sine-wave operators per channel, and include 8 different ways of combining these operators together. The YM3812 is a 2-operator chip that supports 3 more waveforms, and 9 channels. The chip could be switched into a mode which replaces the last 3 FM channels with 5 channels of unique percussion sounds controlled with the FM channels' patch registers. This means the chip can produce up to 11 channels of sound at once.
  3. But @Frank van den Hoef did confirm in another thread here that an LFSR is used in the hardware HDL. He didn't give any specifics though, like the LFSR's width and what taps it uses, or if it's shared or per-channel.
  4. Has the VERA PSG's noise LFSR algorithm been revealed yet? It's not implemented in the emulator's PSG code as far as I'm aware.
  5. How is this a coincidence? What am I missing?
  6. I guess because it has 16 PSG channels?
  7. Using BNE instead of BRA or JMP is a way to automatically terminate printing if the string ever goes above 256 characters. Once X contains $FF (index of the 256th character), and the INX is executed, the value in the register will wrap back to $00. The Z flag in the processor status register is set to indicate a result of zero. Since BNE branches only if Z is cleared, the branch never sends the program back to "Loop" to repeat for any more characters, and falls down to the RTS. If you didn't use BNE, then printing a string that's 256 or more characters long will cause the loop to never end, repeatedly outputting the first 256 characters over and over. Unless the interrupt handler somehow modifies the string so that a terminator ($00) is present, you have to reset the machine.
  8. I thought I heard the X16 command prompt uses layer 1 and not 0?
  9. The VERA has PSG registers located from $1F9C0 to $1F9FF. I think the best solution is to have the PETSCII character set moved to $1F000, so that bank 0 now holds enough capacity for 64 KB worth of tiles. $1F9C0 onwards has no longer been general-purpose video memory ever since the VERA 0.9 changes got put in place. Palette and sprite registers used to be in separate bins, but now they hog the very end of VRAM.
  10. 2 out of 256 bytes? Doesn't sound like very much to me! Those are the same addresses as the 6510's I/O direction and data registers, itself is used in the C64. Oh, if I remember, ZP locations $02 to $7F are allowed to be used by the user, locations $80 to $FF are used by the kernel. $02 to $21 supposedly are designed to be sixteen virtual 16-bit registers (or 32 8-bit registers, since changing values in memory must be done on a byte-by-byte basis). You can see these defined within @SlithyMatt's assembly code.
  11. Also, I see you use a BRA instruction in your code, which is on the 65C02 but not the original.
  12. I mean, some assemblers use/support INA and DEA for consistency with the X and Y equivalents, but those aren't official.
  13. The RPi400 is to 2020 as the Sinclair ZX81 is to the late 70's.
  14. It's possible to use the carry flag as a 1-bit argument.
  15. Have you ever seen the FAQ page? It says "WDC 65C02S @ 8 MHz".
  16. AMAZING JOB!!!!!! This likely wouldn't be reliable for use in an actual game though, considering how CPU-intensive synthesizing PCM audio on the fly is. If you want to reduce the CPU usage though, have you thought about using some of the additional 65C02 instructions? All of them are said to be compatible with R38.
  17. I have another version that does a dummy read: rewindChannelNumber: LDY $9F22 ; Save ADDRx_H and auto-indexing factor LDA $9F25 ; Retrieve CTRL register AND #$01 ; Mask all but the ADDRSEL bit TAX ; Put in X index register LDA #$38 STA $9F22 ; Decrement=4 LDA $9F23,X ; Do the dummy read and decrement (Can you give a clue why I used an index register?) STY $9F22 ; Restore ADDRx_H and auto-indexing factor RTS This one probably is less efficient, but it only takes 1 label instead of 2.
  18. Yep! After the code is executed, ADDR0 points to $1F9C4, which is the start of the 2nd channel. So you'll need to manually rewind it by 4: rewindChannelNumber: LDA $9F20 ; Retrieve ADDRx_L BEQ rewindChannel16 ; Skip this if zero SEC SBC #4 ; Subtract 4 STA $9F20 ; We're done RTS rewindChannel16: DEC $9F21 ; If past 16th channel, decrement ADDRx_M LDA #$FC STA $9F20 ; ADDRx=$1F9FC RTS
  19. Why are you re-setting $9F20 every byte written? You could just use the VERA's auto-increment feature. Here, this code should work better: STZ $9F25 ; ADDRSEL=0, DCSEL=0 LDA #$C0 STA $9F20 ; ADDR0=$xxxC0 LDA #$F9 STA $9F21 ; ADDR0=$xF9C0 LDA #$11 STA $9F22 ; ADDR0=$1F9C0, Increment=1 LDA #$4A STA $9F23 ; Frequency=$xx4A LDA #$04 STA $9F23 ; Frequency=$044A LDA #$FF STA $9F23 ; Volume=63, Left=1, Right=1 LDA #$3F STA $9F23 ; Duty=50%, Waveform=Square
  20. Also, don't forget the "LDA #0 / STA addr" combo can be replaced with "STZ addr" on the 65C02.
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