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Roman K

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  1. You mean some modes are less usable by developer due to CX16 architecture solutions and memory map? So I should just avoid some of them?
  2. Going to start today with NE555 generator I was ordering parts for the computer and videocard for several months, now I have everything needed. And if it works I hope to connect the Am9511 FPU to it
  3. It's easier/cheaper to create faster hardware than gather talented low-level coders - that's the answer. Like nobody builds their own house or car now. And builders neither build their tools or create materials - that's inefficient. So low-level coding is an engineering pleasure (and retro-computing is a pleasure with taste of nostalgia) but there is (almost) no way back. High-level tools give you enough level of abstraction to make complex things without need to understand complex principles. It's more craft than art. You take building blocks and construct something you need very fast. Just an example - I had an estimate for a small startup recently. The customer asked to follow the design with per-pixel accuracy. We had to implement doughnut graphs with labels placed in a special way. So customer could not believe or realize that implementation of that small feature he demanded would take the same amount of time as the whole project. Just inventing, testing and tweaking of the algorithm of label positioning with incorporation of code to the existing library as a plugin. With time required to understand how that library was built and how it works.
  4. @ZeroByte I mean overriding the memory, not another device. Like my device with RAM on it listens to the address bus and responds to the CPU if some memory address is requested. If there is memory chip already responsible for that address, how is that conflict resolved? That should happen on real devices. Or there is a dedicated IO range that is not handled by RAM and can be used by devices?
  5. That can probably lead to some better abstraction instead of existing one, that can be reused in some other mid-level language. I'm still searching for one. I found the usage in only two or so calls. That's quite inconsistent. Like, I cannot rely on that space as being register extension, as they can be changed by some Kernal calls. But saving of a 'register page' is somewhat expensive. Especially if we want to perform it time to time. That's why I am thinking about possibility to switch.. may be not the whole Zero Page but only the block of 16 or even 32 registers in zero page via the similar mechanism we implement banking. With a kind of sweet 16 VM on top of it, probably even extended to be sweet 32. But that's a completely different machine architecture.
  6. Is it possible to implement additional mapping via the extension card? Is there any documentation on how banking implemented at all? And how can memory values be overridden. Like device listens to some memory addresses (IO to memory mapping as I understand) and provides its own memory instead. That's the way it works for devices, but I'm just curious - what happens with original memory then?
  7. I was playing a little with x86 assembly when I was a kid and now SUDDENLY decided to try some retrocomputing. The X16 was a pretty obvious reason, so I started learning the 6502 assembly. And that's HARD though I'm having a lot of fun. The problem is that lots of books and tutorials answer the question 'WHAT' but never 'WHY'. Like they patiently explain how to work with different addressing modes but never when and why to use them. Book after book, tutorial after tutorial - everywhere I get the same info that is almost useless without the practical examples, not just "how to address that stuff". I'd wanted to share my understanding of the potential usage of different addressing modes and ask for some clarification or better ideas if possible. As we know, there are 16 addressing modes in total, 3 of them were added in 65c02. 1 - 3: Immediate, Accumulator and Implied modes are not technically 'addressing modes' as they have nothing to do with getting the memory location. JMP and JSR instructions and their modes are somewhat special. Actually, JMP means Load PC counter (and JSR is the same, but with additional saving of the return address to stack). So technically what we call the Absolute mode for the JMP instruction is Immediate (take the immediate 2-BYTE value and put it to the PC register), what we call Indirect mode is Absolute for JMP (take the address that is stored on that location and put it to PC) and the same stuff for Absolute indirect addressing for JMP added in 65c02, it's just Absolute, X mode (take the address with the offset and put it to the PC register). That's not a critical addition, but quite important for me. And I've seen it only once. Though I'm not going to make exceptions for these instructions further. So. 4. Relative mode. Used only with different branch instructions so can be used for organizing conditional or unconditional (BRA) short jumps and loops (happens often, but no other uses). In case the loop body is really big and 127 bytes of the offset is not enough can be combined with the long jump (JMP abs). 5. ZP relative mode is much less popular. Operates with variables in Zero page and used only by BBR/BBS instructions for the same purpose - short or long jumps but now depending on concrete bit values. 6. Absolute mode. The most important one as it's supported by the vast majority of commands. If compared with high level languages, using absolute mode is the same thing as defining simple variables and performing actions on them. and so on. Assembler turns labels into absolute values, based on .org definitions. The bad part of such variable declarations - it's static and it increases the code size. We mix code and data and we cannot move beyond the user area ($9EFF). By using banking we can have several instances of complex structures (up to 256) with instant switching between them and that gives us lots of opportunities. But that requires a kind of 'manual' memory management unlike the definition via labels. On the other hand, memory is not wasted, program size is not increased, going beyond the user area is possible. JMP makes far jumps, JSR calls subroutines, that's ok. 7. Zero page mode. Mostly the same as absolute mode, but 1 cycle less in speed, 1 byte less in memory. Half of ZP is occupied by the system already, so we have 126 bytes only with 32 bytes given to virtual registers, so even 94 bytes remains. As CPU works at much higher speed and X16 has much more memory, ZP mode is not so usable now. Probably, we can use virtual registers with all supported commands but all other ZP space should be used for indirect modes with values just loaded and read via move commands. Just recently I read about Sweet 16, need to investigate more. Just curious if it can share the same space that is used by virtual registers if I want to use it or I need to free some extra ZP memory for it. 8. Absolute,X mode allows working with arrays or strings and working in loops with help of the X register. A little bit less of available instructions. More problems if we want to use labels - need to allocate more memory that will increase the program size, can go beyond the limit and overwrite the code in a loop. Working with zero-end strings is even worse - you never know where it ends. And the X register is only 8 bit wide. 9. Absolute,Y mode is similar, but provides even less instructions. Can't invent much use of it. Maybe working in the same loop with moving from the end to the beginning, while X moves from the beginning to the end. Or processing the array with some dynamically adjusted offset. I don't know a good example of usage of 10. ZP, X (and tiny 11. ZP, Y) modes due to the small size of Zero Page. Like, if it's about arrays why not use absolute addressing instead? I'll spend more time by moving the data to/from ZP. 12. Indirect mode is used only by JMP instruction. And literally everywhere they tell you: Indirect JMP bug and that’s all The benefit of this mode is that you can calculate the address during the execution. Though that’s achievable via self modified code: So the good use is calling some OS routines via indirect calls with possible replacements or additions (like custom handlers). The problem is that there is no indirect JSR. 13. Indirect, X - simplifies handling of jump tables or something like complex switch instructions. 14. (ZP), Y indirect mode looks very promising when it comes to arrays or other blocks of memory that need to be dynamically created. Something like copying memory blocks from one destination to another. And two remaining addressing modes are quite unclear to me. 15. (ZP) indirect introduced in 65c02 is a complement to indirect mode used by JMP instruction (with limitation to ZP only), so we have that orthogonality Absolute addressing (including jump) - Indirect addressing (including jump) but due to ZP size limitations I can hardly imagine the good usage for it. And finally the most complicated 16. (ZP, X) mode that looks totally unusable. Sorry if that looks too verbose or primitive to you, but I'm trying to be systematic in my understanding of the CPU and assembly.
  8. My 12 years old son learns Arduino and Python. A little bit of electronics, but mostly modules in simple form without deep understanding of how it works. He doesn't share my interest in retro-computing. He doesn't feel that nostalgia to old games (that are really primitive to him even comparing with Minecraft). I had NES before I got my first 486 based PC, so at least I'm curious how was it working. And also I'm interested in the deepest internals of the working computer and X16 is perfect as it can be totally understood. But I'm pretty old boy. For my son Python is a much better and powerful replacement for Basic and Assembler language is too complicated for all near-IT kids. So X16 will be quite niche product, unluckily.
  9. Thank you for such a detailed answer! Is it possible to make an expansion card with onboarding DMA controller and current schematics?
  10. Why spend time on ancient 8 bit computer that cannot be even used for mining? Though ok, it can.
  11. As x86 wasn't initially meant to be a "home" or "gaming" computer, its graphical cards were relatively simple. You had a set of registers allowing you to change the video mode and a set of BIOS routines simplifying even that process. VGA at its best was giving you 64K of video memory mapped in four banks. You could set your palette and then just put pixels by addressing memory with CPU doing all the job. Only in 1990s in SVGA era, when first 3D accelerators appeared some chips were allowing you to use such stuff as double-buffering and some acceleration like bitblt, lines, circles and maybe polygons. Commodore, Amiga and lots of consoles were totally different. They had relatively weak CPU with small amount of RAM and lots of the quite autonomous chips with plenty of features. So yes, VERA is powerful enough to do everything by its own.
  12. It's not only about multitasking in sense of typical multiprocessing OS. What about something like complex video-music handlers? There are portions of code that have to be executed periodically. Like a complex subroutine that can switch the context totally without need to put data in/out of context. Maybe even not the whole zero page but something like block of so called registers - 256 of them multiplied by 16 gives us 4096 bytes of easily accessible memory. And probably the same with stack, 16 instances of 256 byte stack. 8K of RAM in total. Treat it not as a request but rather as a theoretical question - how would you use such an addition?
  13. Sorry, this topic is an exact duplicate of that topic -
  14. LOOOL. I came here today RIGHT AFTER I watched exactly the same video With exactly the same question. What a coincidence.
  15. "It's more a theoretical question."
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