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  1. If 12 Volt is important You can always have a barrel connector taking current from a 12 v transformer with a small voltage regulator for the 5V lines.
  2. I'm sorry for the late reply but I'm curious where the 6,25 MHz frequency comes from.
  3. the commander X16 is not affected by "bad" scanlines of memory. so we can use the 20 microsecond timing
  4. Isn't the ATTINY 861 connected to the Via with I2c? can the comunication be performed 2 bits at time (if useful)?
  5. maybe you should use the fact that one full bye of movement is free i'll try this LDA highb-inp STA midbyte2 STZ highbyte2 ; because 16:8 is a 24 bit number lda lobyte-inp ldy #2 :loop ASL A ROL midbyte2 ROL highbyte2 LSR highb-inp ROR lobyte-inp DEY BNE :loop ;given priority on code compactness CLC ADC lobyte-inp STA lobyte2 LDA highb-inp ADC midbyte2 STA midbyte2 TYA ; same as LDA #0 because now Y is zero ADC highbyte2 STA highbyte2 RTS
  6. This is an interesting topic But i hava a question : can software IRQ be generated in this system? maybe just jumping to the IRQ address?
  7. There's a thing I've never understood: why there is no "non multiplexed" 65c816 ? It would be a very nice chip for low end , hobbyist and low power application.
  8. I think that the best way to implement the commander x 16 e should be an fpga with 512 kB of block ram Ram could be divided as follows 64 base + 128 video +320 banked inside such a capable fpga all the chipset should find room.
  9. very impressive! the only suggestion I can give you is to change the color of the title screen background: like to a much darker blue or to a warm color ( if in the background there's a sun )
  10. if there's room for more spi devices what about a spi ram module?
  11. If possible release it also as an 8 bit ISA card because as a matter of facts a very large number of retro machines are x86 : imagine what a boost an indie developer can get from having two bit planes , a tile mode with hardware scrolling and hardware sprites... better portability also between x86 and commander environments.
  12. i was thinking: isn't flash memory much slower when written? can it sustain the 12 Mz frequence ? the vera fpga has proved to be capable to integrate at least the 65c02 cpu and a usb controller: wouldn't be a less controversial saving to use it to emulate an FM CHip in the X16?
  13. Goood evening first of all I would ask : if a commander X8 has been somewhat ready for some months , how are we far from having the fully compatible X16e ready? As for The commander x8 I think we should decrease the cpu frequency to 8.33 Mhz (25/3) to ensure CX16 is a better machine but i'm in favor of showing the 16 kb of low ram, which will be hidden by ROM, as 2 8 kb banks so people starts to use this feature. for what concerns the Commander X16 I would make the phase 2 version the main one because I don't think anyone will ever abandon the project because of SMD components while this could happen with an FPGA based system.
  14. Hi my name is Fabio I've observed with interest this project from almost the beginning. MY interest in retrocomputing arises from the fact that computing and gaming industry is stuck in a loop where better hardware doesn't translates in a better user experience (at least not linearly). There is plenty of otherwise functional machines made obsolete by software: what a waste!
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