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Showing results for tags '65c816'.
There has been a lot of discussion in the past about the decision to use a 65C02 instead of a 65C816 in the CX16. I've read on the 6502.org site that dealing with the data/address pins can be difficult, even with the info provided in the data sheet. So it was interesting to run across a series of videos from a guy named Adrien Kohlbecker, who's attempting to design a basic system using it. I have no idea what his ultimate plans are, apart from the rev A specs in the introduction (Bank 0 RAM, some ROM and extended RAM, 6522 for peripherals, and a serial port). But those who like Ben Eater's videos will probably like what he's doing here. I especially appreciate how he's breaking down the timings, trying to visualize each problem that needs to be solved, updating the schematics, connecting everything on breadboards, testing, etc. Videos seem to be coming regularly, and so far he's handled the multiplexed bus, BE and RDY pins. He hasn't actually run the CPU in the design yet, but he's done basic tests of the latch/buffer for the data bus and bank address. The methodical approach he's taking is very promising, and it's been interesting to watch the progress. Apologies if this has already been posted. I tried searching for it and came up empty. Intro video is here: