Jump to content

A Modest Proposal: A Hobbyist Fab


Recommended Posts

(One of) the biggest problem(s) for new/old computer concepts like the Commander X16, ZX Spectrum Next, and Mega65 is that, with many support chips no longer in production or even sufficiently documented in the first place, forcing the use of HDL-synthesized FPGA softcores.  This leads certain people to feel uncomfortable about a given projects "Clarity of Puropse."

To be certain, it is possible to contract various firms for an "FPGA to ASIC" conversion process, except that it still involves modern chip fab process nodes, demanding no more than 2.5 volts, which means more different voltages (and minimum layers) on a given motherboard.  As far as I can see, the current absolute back-end-of-the-line process node is no smaller than 250 nanometer, and the last time I checked for certain was back in 2012.  Unfortunately, it looks like Home-level 3D printing is simply not up to the task of creating integrated circuits more complex than the Intel 2002 on processes measured large fractions of the millimeter, if that, and according to the standard news sources like EE Times, current projections of advancement in that era forecast a truly cottage microchip industry arriving in a matter of decades.  I am not quite that patient.

What this group needs is a sort of "Hobbyist Fab" catering to a clientele such as ourselves, offering chip batches by the (current) industry standard wafer size in nodes ranging from 3 to .5 microns, in CMOS, NMOS, HMOS, and VMOS processes, and possibly SOI and some form of FinFET if they don't cut into transistor density at those nodes too much.  This means voltages of at least 3.3.  The way its commercial model would work is that a client would send the fab a standard HDL file for the chip, specify process, node, and package/pinout, and the fab would then derive a prospective transistor budget, die size, maximum chip count per wafer, and price per wafer.

Since the cost for making masks is the bottleneck, and putting multiple die types on the same wafer can spread out costs only so much, I propose this fab invest in maskless lithography.  I have found several companies offering maskless fab tools, but no prices are quoted, and I simply can't be certain if they are usable for electronic semiconductors, or strictly optronics, not to mention the issues of packaging, labling, and pinouts.

Anyone else what to comment, or is my idea simply wacky?

Link to comment
Share on other sites

11 minutes ago, picosecond said:

I can't tell if you're serious or playing semiconductor buzzword bingo.  I am going to have to go with "simply wacky".

I am serious, or at least as serious as I can be without money to put where my mouth is.

Link to comment
Share on other sites

I guess there was a thing starting to come about a couple years ago called "Minimal Fab", which was a machine, or series of machines, that could do custom, small-scale runs of chips. Still far too expensive for an individual (unless you're Tony Stark), but within reason for a robotics, industrial tools, or tech company that wants to fab their own small quantities of chips.

https://news.ycombinator.com/item?id=20657398

Link to comment
Share on other sites

1 hour ago, SlithyMatt said:

I'm going to start an artisanal fab in my basement that produces organic, GMO-free ICs. Come visit my table at the Farmer's Market.

GMO free should be easy, just do it in a closed basement with HEPA air filtration so no GMO pollen can get in.

But can you guarantee you use no chemical fertilizers or pesticides in the production of your chips?

Link to comment
Share on other sites

5 hours ago, Kalvan said:

(One of) the biggest problem(s) for new/old computer concepts like the Commander X16, ZX Spectrum Next, and Mega65 is that, with many support chips no longer in production or even sufficiently documented in the first place, forcing the use of HDL-synthesized FPGA softcores.  This leads certain people to feel uncomfortable about a given projects "Clarity of Puropse."

Other than mollifying the "clarity of purpose" crowd, what does this get us? Are we going to have ASICs fabbed whose design hasn't been proven on FPGA first? If not, why not just use the FPGA and skip the fabrication process? One of the major benefits of an ASIC over FPGA is size and/or density. At the node sizes you are proposing, we would get neither.

  • Thanks 1
Link to comment
Share on other sites

9 hours ago, BruceMcF said:

But can you guarantee you use no chemical fertilizers or pesticides in the production of your chips?

Not only that, but I use Faraday cage-free electrons for all testing, and cruelty-free ceramic packages.

  • Like 1
  • Haha 3
Link to comment
Share on other sites

6 hours ago, Wavicle said:

Other than mollifying the "clarity of purpose" crowd, what does this get us? Are we going to have ASICs fabbed whose design hasn't been proven on FPGA first? If not, why not just use the FPGA and skip the fabrication process? One of the major benefits of an ASIC over FPGA is size and/or density. At the node sizes you are proposing, we would get neither.

Probably for the same reason some in the community would rather discrete components over a single FPGA. Personal preference.

If there was a 'CPUWay' I'm sure the designers would be looking at it.

You can of course use the same logic about a computer based on 40 year old tech, vs what $100 can buy you today.

Link to comment
Share on other sites

1 minute ago, Yazwho said:

If there was a 'CPUWay' I'm sure the designers would be looking at it.

There are many contract fabs that will convert FPGA code to ASICs. It all comes down to the unit order. It's very expensive to do in small batches. That's why it's pushed off post-stage 3, which will still be FPGA, which is much cheaper until you hit that magical unit count. Once you are moving Raspberry Pi-level scales of SBCs, it makes more sense to go ASIC, and it would be truly a dream come true to have the X16 get that kind of demand.

Link to comment
Share on other sites

A quick Google search suggests that ASIC becomes more affordable than FPGA when one reaches about 400,000 units. This of course assumes that the ASIC is rock solid and doesn't require replacement. For some ASICs it isn't an issue: any "defects" become "features" at some point. If trying to reproduce old designs that becomes a bigger issue, as a defect between old and new means that it is no longer compatible.

FPGA has the potential benefit that it is "always" upgradeable, so defect resolution is a simple download / reflash away.

  • Like 1
Link to comment
Share on other sites

On 8/24/2021 at 7:27 PM, Kalvan said:

I am serious, or at least as serious as I can be without money to put where my mouth is.

When the topic begins with "A Modest Proposal", it's hard not to assume that the proposal isn't satire.  Having said that, while it would be great for retro enthusiasts to have, it just doesn't seem feasible right now.  Maybe it becomes viable as time passes?  Hopefully the enthusiasm for retro tech hasn't subsided by then.

Personally, I view the benefits of discrete logic primarily for 1) hobbyist tinkering, and 2) education.  I think it's been mentioned in the main "X16 change in direction" thread already, but the education I'm thinking of is that of practical application.  Kit computers that use TTL logic, through-hole chips, and real CPUs expose just enough for someone to grasp how a computer actually works.  Not at the atomic or quantum level of diodes and transistors, but at the level where you might want to build something that does a useful/interesting thing.  And it's a nice stepping-stone to to other areas of computing, if hardware is your interest.

Having said that, other than to create chips that replace disappearing stocks of SIDs, VICs, and other nostalgic old parts, I don't see the strong benefit to a retro fab.  As others have mentioned, FPGAs and other programmable logic components are essentially a "personal fab" that can stand in for the time being.

  • Like 1
Link to comment
Share on other sites

16 hours ago, Calculon said:

Having said that, other than to create chips that replace disappearing stocks of SIDs, VICs, and other nostalgic old parts, I don't see the strong benefit to a retro fab.  As others have mentioned, FPGAs and other programmable logic components are essentially a "personal fab" that can stand in for the time being.

VICs, VIC IIs, SIDs, POKEYs, StereoPOKEYs, QuadPOKEYS, Sega VDCs, SegaPCMs, most of the catalog of Yamaha's V, YM, YMF, and WMW chips, most of Ensoniq's pre-Creative Labs sound chip designs, all those Okidata MCM series ADPCM chips, all those Namco, Konami, and Sunsoft arcade and Famicom/MSK add-in sound chips, the Seta X1-010.

It's not just hobbyists that can benefit from this venture.  Arcade owners are another possible customer.

Also I definitely mentioned sending HDL files to the fab.  Clearly, those would by definition require validation on an FPGA fabric as a step prior to production.

Link to comment
Share on other sites

1 hour ago, Kalvan said:

VICs, VIC IIs, SIDs, POKEYs, StereoPOKEYs, QuadPOKEYS, Sega VDCs, SegaPCMs, most of the catalog of Yamaha's V, YM, YMF, and WMW chips, most of Ensoniq's pre-Creative Labs sound chip designs, all those Okidata MCM series ADPCM chips, all those Namco, Konami, and Sunsoft arcade and Famicom/MSK add-in sound chips, the Seta X1-010.

It's not just hobbyists that can benefit from this venture.  Arcade owners are another possible customer.

Also I definitely mentioned sending HDL files to the fab.  Clearly, those would by definition require validation on an FPGA fabric as a step prior to production.

True, but that’s still a very small market when considering chip fabrication as it currently stands. I found the Itsy Chipsy project kind of interesting, even if the target audience isn’t necessarily retro, and they haven’t posted much since 2018. But since they mentioned DIP40 in their proposal, it got me curious to read a little more. Maybe that, or something like it, bears fruit one day and creates some opportunities for cheap(er) custom silicon?

Link to comment
Share on other sites

On 8/26/2021 at 3:01 PM, Kalvan said:

VICs, VIC IIs, SIDs, POKEYs, StereoPOKEYs, QuadPOKEYS, Sega VDCs, SegaPCMs, most of the catalog of Yamaha's V, YM, YMF, and WMW chips, most of Ensoniq's pre-Creative Labs sound chip designs, all those Okidata MCM series ADPCM chips, all those Namco, Konami, and Sunsoft arcade and Famicom/MSK add-in sound chips, the Seta X1-010.

It's not just hobbyists that can benefit from this venture.  Arcade owners are another possible customer.

Also I definitely mentioned sending HDL files to the fab.  Clearly, those would by definition require validation on an FPGA fabric as a step prior to production.

You have mentioned many chips that have significant analog circuits in their design. FPGAs don't generally handle that bit of ASIC design and if they do it is in the form of a hard IP block which you cannot have manufactured into your design without a license.

Link to comment
Share on other sites

On 8/29/2021 at 6:07 AM, Wavicle said:

You have mentioned many chips that have significant analog circuits in their design. FPGAs don't generally handle that bit of ASIC design and if they do it is in the form of a hard IP block which you cannot have manufactured into your design without a license.

Aside from proprietary languages meant for one company's portfolio, like A(ltera)HDL, FPGA hardware description languages are (ideally) hardware agnostic and meant for some level of abstraction within the fabric of the FPGA by the synthesis tools.  If the HDL supports analogue circuits, then the fab (assuming it's using general purpose tools, which this hypothetical Hobbyist Fab would be) can fab the design as specified in the HDL, assuming the fab supports that HDL.  Obviously, this complicates transistor count (the same way translating FPGA hardware multiplier blocks into actual multiplier logic, and vice versa, does), but that's why the fab would give feedback to the client in terms of transistor count and projected thermal characteristics for its designated max clock speed.

If the HDL design includes analog circuits, and it isn't in an FPGA company's proprietary HDL, the Hobbyist Fab will fab the wafer with the analog circuits in the design, not necessarily the layout in any particular FPGA fabric.

Link to comment
Share on other sites

2 hours ago, Kalvan said:

Aside from proprietary languages meant for one company's portfolio, like A(ltera)HDL, FPGA hardware description languages are (ideally) hardware agnostic and meant for some level of abstraction within the fabric of the FPGA by the synthesis tools.  If the HDL supports analogue circuits, then the fab (assuming it's using general purpose tools, which this hypothetical Hobbyist Fab would be) can fab the design as specified in the HDL, assuming the fab supports that HDL.  Obviously, this complicates transistor count (the same way translating FPGA hardware multiplier blocks into actual multiplier logic, and vice versa, does), but that's why the fab would give feedback to the client in terms of transistor count and projected thermal characteristics for its designated max clock speed.

If the HDL design includes analog circuits, and it isn't in an FPGA company's proprietary HDL, the Hobbyist Fab will fab the wafer with the analog circuits in the design, not necessarily the layout in any particular FPGA fabric.

The HDLs are generally hardware agnostic but they describe digital logic architecture not analog - basically anything that can be crafted using gates (the first thing the HDL compiler does is reduce your RTL into a synthesizable gate netlist). Most designs today either use an external DAC IC (e.g. X16's VERA uses a resistor ladder DAC on the PCB for VGA) or they have a single DAC block internally and pass the digital signal to it as the last step before heading to the pins. They do this because the design and verification tools for digital logic are easier and cheaper therefore it is much more cost efficient to push the analog conversion to a dedicated analog IC or a pre-defined generic DAC that can dropped into the design (and can usually be implemented as an R-2R ladder since precise impedance values are very difficult to manufacture in an IC but relative values are not).

What is the hobbyist fab getting us that isn't done faster and much more cheaply using FPGAs or commodity ARM-based SoCs?

I guess compare this to the many options you have for a hobbyist etching/milling their own PCB to sending your board out to be manufactured. Unless you're really in love with the idea of making your own PCB in your garage, you send your board Gerbers out to be manufactured.

Link to comment
Share on other sites

  • 3 weeks later...
On 8/26/2021 at 12:03 AM, SlithyMatt said:

Not only that, but I use Faraday cage-free electrons for all testing, and cruelty-free ceramic packages.

LIAR !!!! I have an EXCLUSIVE EXPOSE video showing many of your so-called cage free electrons are actually raised in BATTERY-LIKE conditions !!!! scandal, news at 11.

 

  • Haha 1
Link to comment
Share on other sites

On 8/25/2021 at 11:41 AM, Kalvan said:

Anyone else what to comment, or is my idea simply wacky?

It's a perfectly sensible serious idea, which can work. Someone beat me to the guy who did this at home, copyright if it still exists for these old things doesn't apply worldwide and knock-off versions are common across the planet. Even the humble Z80 was produced on both sides of the iron curtain, and today, there are actually 'counterfeit' chips. So there are logically places in the world where they churn out something from a factory which is larger than someone's garage, and what they churn out is whatever gets them some money. There is plenty of abandonware out there, and for things that can't be morally copied, there is always the discreet approach reverse engineering. I know the zy-haruna is not reverse engineered but I know it is intended as a full opensource free design intended to do what the custom chips did in years past. From what I've seen so far, I'm very impressed. There would be other projects out there too, or will be in time, or hey, make it if you can't wait.

 

You're idea is sound.

  • Like 1
Link to comment
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

 Share

×
×
  • Create New...

Important Information

Please review our Terms of Use