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Kevin Williams

Commander X16 - Second Prototype PCBs are Here!

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Hi Everyone,  
    

  If you happened to see David's video on the Color Maximite 2, then you probably noticed that the new Commander X16 PCBs have arrived!  David @The 8-Bit Guy just happened to swing by my house the day they arrived, and he picked them up before I was even able to get all of the parts in.  I am still waiting on a few things, so I haven't been able to complete assembly yet.  The VERA is also not complete for this reason, but I had to mock it up for the pics!  Bear in mind, this is not the correct case, this is from an old tower ATX case I had sitting around. It's a nice platform to mount the board and make sure I have the placement of screws, slots & of course the rear ATX panel aligned correctly.  I will likely make a few placement tweaks but overall I am quite happy with the physical layout so I just had to post some photos!


 So far, it's working but my ATX soft-start circuit is a bit squirrelly. Not only that, I kinda wired it wrong and didn't catch it before the run.  Worked great on the breadboard, but I will have to revamp that before the final.  There are also a few other little things discovered since this proto was run, but the real tests will be coming when @Michael Steil is able to get the Kernal up and running.  (I would write some test code, but one part I'm missing is the ZIF socket for the ROM.  Should be here in a day or two.)

@Perifractic is also sending me the X16 case, so I should be able to install the board in there later this week.

Happy Sunday, and Take Care Everyone!
-Kevin Williams  
https://TexElec.com

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Posted (edited)

Amazing progress in a very short time.

Well done!

Edited by snake
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Tasty. Very tasty.

Probably been answered before but can someone just explain the differences between the X16 P, C and E versions when they come around.

Also @Kevin Williams is the plan to mount the user port on the ATX panel above the SD card slot in the final machine? Otherwise we'd be losing a expansion slot bay. 

Peapod

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1 minute ago, peapod said:

Probably been answered before but can someone just explain the differences between the X16 P, C and E versions when they come around.

Did you check the FAQ? 😉

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22 minutes ago, Perifractic said:

Did you check the FAQ? 😉

Have now. Completely missed it first time round sorry.

P is what is being prototyped at the moment, phase 1

C is the mini itx version in phase 2

E is the raspberry pi size one in phase 3

Old person brain here, didn't join the dots at first glance.

Ta muchly for the redirect to the FAQ.

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Posted (edited)
45 minutes ago, peapod said:

... P is what is being prototyped at the moment, phase 1

C is the mini itx version in phase 2

E is the raspberry pi size one in phase 3

While not the "real mneumonics", "pro", "compact" and "extremely compact" is one way to keep them straight.

(e seems to be for "enhanced", but mum's the word on what those enhancements might be -- first have to sort out all the details of the CX16p reference system.)

___________________________________________

I am quite chuffed to see the SNES controller ports, I was always a big proponent of using those over the NES ones.

Edited by BruceMcF
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Board looks great - that blue color is really striking!

It's exciting to see real hardware coming together. 🙂

Taking a look at the hardware, if kit form is offered (I really hope it is), hopefully there's an option for the main board to be a kit, but the VERA to be preassembled. For those of us old farts, hand-soldering SMD components is tricky at best.  Old eyes plus the beginning of essential tremors is a bad combination for tiny parts. 🙂

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Posted (edited)

Wouldn't assembly cost a lot given that the motherboard is all through hole?

Edited by Gold

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It will cost more, but the vision of the first step is through-hole and easy to understand.  Later versions will be surface mount and cost reduced.

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Posted (edited)
2 hours ago, Gold said:

Wouldn't assembly cost a lot given that the motherboard is all through hole?

Remember that there are surface mount packages for the Western Digital Chips, and of course for the SRAM and flash ROM, so the only "long" IC's in the CX16c might be the two sound chips ... and depending on demand for the CX16c and supply of the sound chips, it's conceivable that they get replaced by an FPGA, which would make it all surface mount parts.

The possibly kit-buildable, all through hole with all of that glue logic like it come from an alternate Universe version of 1989 (except the original Video assembly died on the journey and had to be replaced with an FPGA) ... that's going to cost what it costs, and the people that are going to be buying it will be because the heart wants what it wants.

Edited by BruceMcF

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I'd really like to see a memory mapped 16 bit ISA slot on that board for support of Vintage sound cards!

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3 minutes ago, -N2 said:

I'd really like to see a memory mapped 16 bit ISA slot on that board for support of Vintage sound cards!

Now THAT would be an interesting expansion card ... but a bit tricky.

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1 minute ago, BruceMcF said:

Now THAT would be an interesting expansion card ... but a bit tricky.

I'm trying to determine how those 50 pin connectors are wired up, are they the standard Apple IIe pinout?  

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Posted (edited)
2 minutes ago, -N2 said:

I'm trying to determine how those 50 pin connectors are wired up, are they the standard Apple IIe pinout?  

No, it's a bespoke slot design. See this post from about a month ago:

 

Edited by BruceMcF
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Posted (edited)
6 hours ago, peapod said:

Have now. Completely missed it first time round sorry.

P is what is being prototyped at the moment, phase 1

C is the mini itx version in phase 2

E is the raspberry pi size one in phase 3

Old person brain here, didn't join the dots at first glance.

Ta muchly for the redirect to the FAQ.

1) I'd like to see a C.2 rev where the entire system is put on a 16 bit ISA card, for use in a passive backplain. 

2) for clock generation, have a look at the Silicon Labs Si5351 series of chips, they are I2C controlled PLL chips that output 3 to 8 independently configurable outputs between 3Khz to 290Mhz. 

Edited by -N2

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52 minutes ago, -N2 said:

1) I'd like to see a C.2 rev where the entire system is put on a 16 bit ISA card, for use in a passive backplain. 

2) for clock generation, have a look at the Silicon Labs Si5351 series of chips, they are I2C controlled PLL chips that output 3 to 8 independently configurable outputs between 3Khz to 290Mhz. 

No, ISA doesn't really make any sense, since the 8088 architecture is too different. Making this ISA compatible would require and extra 4 bits of address space, and a way to generate the IOW and IOR signals. The 6502 also reads and writes in a single, two-phase clock cycle, while the 8088 has a total of four clock cycles per bus cycle. You could interface with an ISA bus through some sort of intermediary, such as a VIA or CLPD, but that's going to require extra hardware and doesn't really give any tangible benefits except partial compatibility with devices designed for PC (and which often use device drivers that take up more memory than the whole of the non-banked RAM on the Commander.)

There are common bus standards that would work, including the RC2014, but even that would have required an intentional design choice from the beginning. 

 

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@Kevin Williams This looks great! I feel like it's 1985 again, and I'm trying to figure out whether to buy the disk drive or the 9" black and white TV....

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