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New Foenix low-cost SBC "C256 Jr."


EMwhite
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With the Flagship A2560K (keyboard model) now shipping and the GEN X near pre-production completion and about to ship in the next month or two, Stefany Allaire announced a new low-cost single-board computer that checks all the boxes.

She took a step back from the WDC 65C816 which has been known to scare classical 6502 bods, and is using the WDC 65C02 running at 6.2x Mhz.

The pic of the dev board was just released;  Based on the capabilities of prior Foenix efforts, I'm guessing this is a capable platform, and employs enough 'standards' to host the X16 with a minimum of arm-twisting.  Stefany has her own Pick & Place machine and is pretty good at parts procurement / supply so I don't see the typical cast of issues getting in her way.

I heard it will be < $200 for the SBC (bring your own power supply and PS/2 kbd/mouse ... but also it has a 20 pin Commodore Keyboard header and other gifts; see pic).

image.thumb.png.764cc32a84ba10a78d54e1df50cb20dd.png

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It's almost 200 times the 31.5kHz horizontal frequency of a standard VGA signal. If that VGA signal's vertical frequency is adjusted to 'drop frame' timing in order to accommodate interlaced NTSC video at 59.94Hz field rate, then the horizontal frequency would drop to 31.4685kHz, and 200 times that would be 6.2937MHz.

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The WDCs, since they are 'modern', can easily tolerate a stopped clock or diff clock speeds, of course.  The pic above is of the development board which is (I believe) a proof-of-concept that she is putting into the hands of a few developers that will be piecing together the operating environment/kernel, etc.  Not sure what form a prod release will take or what the timeframe will be but if successfully released with even 3/4 of the features on that board, it will be compelling.

 

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6.29375 = 25.175 / 4

25.175 is the pixel clock for 640x480 VGA. Each of those 31.5kHz scanlines has 800 clocks and 1/4 of that would be 200; so it is also 200 times the 31.5kHz horizontal frequency.

Using divisors, especially power of 2 divisors, of a single master clock within a single design allows you to have essentially a single clock domain; this allows you to avoid implementing complex clock-crossing FIFOs for every signal that has to move between the fast and slow domains.

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On 6/24/2022 at 5:07 AM, Wavicle said:

6.29375 = 25.175 / 4

25.175 is the pixel clock for 640x480 VGA. Each of those 31.5kHz scanlines has 800 clocks and 1/4 of that would be 200; so it is also 200 times the 31.5kHz horizontal frequency.

Using divisors, especially power of 2 divisors, of a single master clock within a single design allows you to have essentially a single clock domain; this allows you to avoid implementing complex clock-crossing FIFOs for every signal that has to move between the fast and slow domains.

Also, for parts where a 8MHz 65xx clock require really tight address select timing, 6.29MHz may allow more slack ... and the further away from the edge of the speed performance envelope, the more robust in the face of some noise.

However, the 65816 is one of the appealing aspects of the Feonix256 systems for me, so I am a bit ambivalent about the 256 Jr.

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On 6/25/2022 at 6:50 PM, BruceMcF said:

However, the 65816 is one of the appealing aspects of the Feonix256 systems for me, so I am a bit ambivalent about the 256 Jr.

And have you bought (or pre-ordered) one of the larger 65C816 Foenix systems?  (Just out of curiosity.)

As I posted elsewhere, my money's in for a Gen X, production of which is now back on track so I should receive it in a few months.

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The way I see it, the craziness of the parts market has put a lot of retrocomputer hobbyist projects on hold.

  • The Ultimate C64 is unobtainable indefinitely due to the FPGA price.
  • The Mega65 is taking second-round pre-orders, but I doubt they're immune to the FPGA price problem either.  Not sure how this one will shake out.
  • The DE-10 Nano for the MiSTer is available but getting hard to find, and going up in price
  • TheC64 (and mini) are available if you're content with a Linux system running an emulator (most people on this forum, even those who bought a TheC64 for the games, probably also want to work outside of emulation at some point).
  • The X16 is in limbo for a number of reasons not necessarily related to the parts market, as I'm sure you're all aware.

But Stefany has specifically designed the Foenix Jr. to be obtainable even in the parts crunch; all the parts are currently sourceable at a price that can keep the system under USD $200; the initial target is under $150.

A key part of this is the much smaller (and still sourceable) FPGA, which is possible because (1) the CPU is an actual 65C02 and not in the FPGA (unlike the Ultimate and Mega) and (2) it runs a trimmed-down but still capable version of the "Vicky" FPGA found in the bigger Foenix machines.

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On 6/26/2022 at 1:55 PM, John Chow Seymour said:

And have you bought (or pre-ordered) one of the larger 65C816 Foenix systems?  (Just out of curiosity.) ...

Yeah, no ... circumstances have changed from when the project started & I was teaching in China. Right now I am busy with 12 hour shifts, six days a week, so don't have any time for playing with any boards -- and saving up so we can start building our house, so don't have a lot of spare funds either, right at this moment. But I'm hopeful that next year, things will have eased up, and also hopeful that the project will get far enough along to take pre-orders or crowd-funding for the CX16c.

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