Elektron72 48 Posted August 27, 2020 Is the clock frequency of the YM2151 in the Commander X16 3.579545 MHz or 4 MHz? Quote Share this post Link to post Share on other sites
0 StephenHorn 305 Posted August 27, 2020 (edited) I believe it's supposed to be 3.579MHz. However, the emulator is currently set to 4MHz. There was a PR to fix the clock speed of the YM2151, but for some reason that PR was attempting to set the YM's clock speed to 2x the intended value, and that sounded wrong. It should be a trivial change to set the clock speed correctly (s/4000000/3579545/g in audio.c), but I think we just need to make sure it sounds consistent on a variety of platforms. Edited August 27, 2020 by StephenHorn Quote Share this post Link to post Share on other sites
0 StinkerB06 29 Posted August 27, 2020 I think 4 MHz would work better on the hardware, since it can be easily divided from the CPU's 8 MHz speed. Quote Share this post Link to post Share on other sites
0 SlithyMatt 605 Posted August 27, 2020 34 minutes ago, StinkerB06 said: I think 4 MHz would work better on the hardware, since it can be easily divided from the CPU's 8 MHz speed. Actually, 3.579MHz is just as easy, as that is already being used for the NTSC color subcarrier by VERA. Plus, it is the manufacturer's suggested frequency. Quote Share this post Link to post Share on other sites
0 StinkerB06 29 Posted August 28, 2020 17 hours ago, SlithyMatt said: Actually, 3.579MHz is just as easy, as that is already being used for the NTSC color subcarrier by VERA. Plus, it is the manufacturer's suggested frequency. Oh, I didn't know the VERA actually exposes the NTSC color clock to the system board! But the main gripe for me is, how would an 8 MHz CPU communicate with a 3.58 MHz peripheral? I'm pretty sure the exact wait-cycle counts would slightly vary depending on the phase of both clocks. Quote Share this post Link to post Share on other sites
0 SlithyMatt 605 Posted August 28, 2020 3.58 MHz is the chip clock rate, not the bus frequency. The YM2151 can receive aperiodic commands from the bus, one at a time. The general interface process is to check the chip to see if it's ready before writing to it. If you need to do a bunch of writes at once, it can take an indeterminate amount of time, as the CPU is spending much of the time busy-waiting as the YM2151 ingests each instruction. Quote Share this post Link to post Share on other sites
0 StinkerB06 29 Posted August 28, 2020 21 minutes ago, SlithyMatt said: 3.58 MHz is the chip clock rate, not the bus frequency. I know. I'm pretty sure that (by contrast) the SAA1099 would run at the CPU's 8 MHz frequency, as that's what the datasheet suggests. Quote Share this post Link to post Share on other sites
0 BruceMcF 294 Posted August 31, 2020 On 8/28/2020 at 4:05 AM, StinkerB06 said: I think 4 MHz would work better on the hardware, since it can be easily divided from the CPU's 8 MHz speed. Except exactly 8MHz would put it asynchronous with Vera, so it's more likely 8.33MHz (50MHz dot clock /6, 25MHz external master clock /3). It is much better to use the spec sheet frequency generator clock for a music chip ... especially when a large number of frequency synthesis chips in that class share a common frequency, as do basically ALL instrument implementations, so almost all of the existing operator set-ups will be tuned for that frequency. Quote Share this post Link to post Share on other sites
Is the clock frequency of the YM2151 in the Commander X16 3.579545 MHz or 4 MHz?
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