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Lorin Millsap

Debugging prototype board

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I figured it’s been a while since the last update. So I’m just letting you know where things are at. Kevin has sent me one of the prototype boards in the hopes that we can figure out why certain parts are not working.

Timing on the ROM and RAM is stable, the two VIA chips are also stable. There is some odd behavior on the banking latches, and the audio and video are not working.

We are certain it’s a timing issue and we will let you all know when that issue is resolved.

By sending me a proto board the hope is that we have a second set of eyes since trying to debug it over email and phone calls isn’t very productive.

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Have you considered enlisting help from the community?  An independent design review couldn't hurt.  All of the secret sauce is inside Vera so sharing the prototype board schematics seems pretty harmless.  I know at least one person here makes a decent living on timing issues...

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Well actually the schematics for the time being are classified. I of course have a copy, but Kevin has asked me not to share them and I will abide that. I am still assembling the board and then I will apply fixes to known bugs. Then I can start checking things with the scope and also use some other tools to see what I can learn.


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Thanks for the update, Lorin. It must be absolutely maddening for everyone on the team to be so close to launching the fundraiser for production, but for the bugs. Good luck!

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Weird question: Is the board itself more than two layers, and if so, is it possible that an inner layer has a discontinuity or a misrouted trace?

I'm just trying to think of something very basic that would nonetheless be difficult to track down.

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9 hours ago, Lorin Millsap said:

Yes it is a multi layer board.

I think I remember somebody from team saying it will be two layer board so to make it more simple, cheaper and more understandable. Did this plan fail? Or am I remembering something wrong?

Edited by Cyber

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5 hours ago, Lorin Millsap said:

Sorry I guess I misunderstood the question then. It is a two layer board.

No problem. I also mistakenly jumped to conclusion.

Ok, it is a two layer board. One layer on each side. No inner layers. Relieved. )

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2 hours ago, SerErris said:

Multilayer >= 1 😉

Yes, the ambiguity is layers of WHAT ... layers of routing, or layers of board. Either one or two layers of traces/routing only need one layer of board, 3 layers of traces/routing needs two layers of board.

Edited by BruceMcF
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What happens if you reduce the clock speed?

Already been tried. It doesn’t have an effect.


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Stefan> What happens if you reduce the clock speed?

Lorin> Already been tried. It doesn’t have an effect.

In a way, I think that's a good thing.

 

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1 hour ago, Ed Minchau said:

Have you considered replacing all of the decoding logic with a single small FPGA?

It goes against one of the project goals: preferably no FPGAs or MCUs.
FPGA video chip is an exception, because capable off the shelf video chip was not found.

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Just some further updates. I have finished the assembly of the board along with the patches that Kevin has documented. It’s not working yet, and my schedule has been very full this week. I’ve ordered some parts I need to build a test rig, and I have a logic analyzer that I just got. So not much to report yet. But just in summary my test rig lets me get to the very basics and monitor and control many parts of the system.


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