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Bader

Splitting clock signal - 6502

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Hello

Just got a 6502 A in the mail which I understand runs at 2MHz. I don't have any of those  crystal oscillators, but I do have a 4MHz. Can I split the signal using logic gates? At the top of my head perhaps an XOR gate and a D-latch set/reset latch should do it? But the details are not the point, the question is, is it viable or would it not be exact enough?

 

Thanks

Edited by Bader

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I don't have time to find the exact location of his solution, but didn't Ben Eater do some kind of clock division for his homebrew VGA circuit?

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There is also this: 

 

He is no Ben Eater (not quite as organized, rehearsed, etc.) but based on his clock starting point, he appears to have based his design on Ben's original clock.  I've got clock dividers in my modular synthesizer that work in very much the same manner.  The shape of the signal (that the presenter struggles with) ultimately causes issues with the ICs dependent on clock but I think below a given # of single digit Mhz. you are probably ok and will need to try it.

 

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Been playing around in Logisim. To halve the frequency, don't I really just need a D-latch with the invertered Q going to the enable (or is it called input) pin? Like I've done in the picture? I don't really need to split the signal, just remove half the ticks.

latch.png

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