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Quick Question: 65C02 Assembly

Question

Which one is correct? They both seem to be the same, i.e. they operate on the accumulator.

LSR

or

LSR A

Is the first one used in 6502-proper and the latter in 65C02?

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58 minutes ago, geek504 said:

That's what I figured too... but that would only make sense if we could do LSR X or LSR Y 🙄

Personally, I don't understand why folks decorate implied ops with A, given the design of the processor it's assumed that the instruction acts on the accumulator unless otherwise specified. I feel like it speaks to a misunderstanding about the processor's X and Y registers, which are not general-purpose. They are indexing registers. This is why the instructions dealing with them are special-case: INX and INY, DEX and DEY, for instance, compared with INC and DEC which have multiple addressing modes. The special-case instructions are not "shorthand" to turn a 2-byte instruction into a 1-byte instruction, nor are they simply differentiated as some 2 bits of addressing mode on top of a 6-bit opcode.

Now, if the 6502 had multiple general-purpose registers, such that it was meaningful which one you intended to act upon, that would be a different matter. Maybe that's where the decorated implied op folks are coming from: They're used to architectures with multiple general-purpose registers, so it would be valid to see something like LSR A, LSR B, LSR C, etc. And then, it's just more comfortable for them to see LSR A or INC A, even though the 'A' serves no functional purpose.

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I would say that LSR is the more correct of the two. Depending on your assembler, both should work without issues, but if you look at the reference for the CPUs, LSR command only takes up 1 byte of memory where LSR ZP and LSR Absolute take up 2 and 3 bytes respectively.

To me that indicates, that that the LSR A is just to make the commands look alike.

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3 minutes ago, JimmyDansbo said:

LSR A is just to make the commands look alike.

That's what I figured too... but that would only make sense if we could do LSR X or LSR Y 🙄

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4 hours ago, StephenHorn said:

And then, it's just more comfortable for them to see LSR A or INC A, even though the 'A' serves no functional purpose.

I mean, some assemblers use/support INA and DEA for consistency with the X and Y equivalents, but those aren't official.

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Give that LSR mem-op and crew are the operations which DON'T touch the A register,  it is understandable that some assemblers support LSR A but ACME doesn't,  so I've gotten used to omitting it now.

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This is a big problem I had when putting together my assembly language editor.  The standard notation is ambiguous, you need to also look at the parameters to figure out what the command itself is.  I''ve been using 4-character codes for the commands instead, so each one is unique.

LSR doesn't just operate on the accumulator, it can also operate on an absolute memory address or absolute address indexed by X or zero page address or zero page address indexed by X. On my editor those commands are LSRI (the I is for Implied when operating on the accumulator), LSRA, LSRX, LSR0, and LSRZ respectively.  After having used it for a while, I'm convinced the four character codes are a better notation.

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Here's the issue... LSR has several addressing modes, like most 6502 mnemonics:

This screenshot is from Programming the 65816 by Eyes and Lichty. 

image.png.1a75d7990f1660d0735d9eb5147f6c14.png

It's also listed this way in the 6502 opcode reference on 6502.org. 

image.png.0d3b3af75b2d7a3098b86deaa0b40701.png

Obviously, the presence of the various memory addressing modes means that we should not take the accumulator address mode for granted. According to the WDC manual, the correct syntax is LSR A.

 

Anyway, it doesn't really matter - you can use whichever syntax your assembler supports. Since both assemble to the same 1-byte opcode ($4A), it's a matter of personal choice. I prefer to see the A operand, since this is more consistent with the other modes, but that's just how I think. 

 

 

Edited by TomXP411

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On 11/4/2020 at 12:29 PM, StephenHorn said:

Personally, I don't understand why folks decorate implied ops with A

That's because LSR does not have an implied addressing mode. It has Accumulator, Zero Page, Absolute, Zero Page-Index, and Absolute Indexed modes. By definition, an operand is always required when a mnemonic has more than one addressing mode. 

LSR A is known as the "Accumulator" addressing mode, and the A should be specified to distinguish it from the other modes. Neither the WDC manual nor the definitive books on the subject list LSR as having an implied addressing mode.

 

 

 

Edited by TomXP411

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4 hours ago, TomXP411 said:

That's because LSR does not have an implied addressing mode. It has Accumulator, Zero Page, Absolute, Zero Page-Index, and Absolute Indexed modes. By definition, an operand is always required when a mnemonic has more than one addressing mode. 

LSR A is known as the "Accumulator" addressing mode, and the A should be specified to distinguish it from the other modes. Neither the WDC manual nor the definitive books on the subject list LSR as having an implied addressing mode.

I'll concede the point, but it still feels weird and inconsistent to decorate ASL with A to indicate $0A. Do we know why the ops for DEX and DEY, as well as INX and INY, are specified as distinct ops from INC, instead of being represented as "DEC X", "DEC Y", "INC X", and "INC Y"?

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1 hour ago, StephenHorn said:

Do we know why the ops for DEX and DEY, as well as INX and INY, are specified as distinct ops from INC, instead of being represented as "DEC X", "DEC Y", "INC X", and "INC Y"?

I'll agree that's totally arbitrary, and you'd have to ask Bill Mensch. My guess is he was thinking about assembler design, and using separate mnemonics for the implied instructions will assembler faster than the same version with mnemonics.

It's worth noting that there are assemblers that do augment implied instructions with ones that take an opcode. 

image.png.4395d562162b2e7732061b64aed19f2f.png

http://tass64.sourceforge.net/

 

 

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